In recent years, the demand for digital devices having high performance and low power consumption has strongly increased. As a way to address this demand, these demands, a multi-core structuring method in which a plurality of processors are mounted on an embedded LSI (Large Scale Integration) has been gaining attention.
To effectively use such a multi-core structured device, although parallel programming needs to execute an application in parallel, generally, there are more considerable and difficult factors in parallel programming than in ordinary single-core structured programming.
To make parallel programming easy, in a multi-processor system presented in Patent Literature 1, a compiler extracts parallelizable sub tasks from an input program and assigns the sub tasks to individual processor units based on their characteristics so as to effectively perform scheduling.
Moreover, in a real time system, an application that is executed in parallel needs to be scheduled such that a situation in which a task is not completed until its execution period elapses does not occur (no deadline mistake occurs).
To prevent this deadline mistake from occurring, a scheduling determination method described in Patent Literature 2 uses a predetermined determination formula to determine whether or not a multi-core based schedule can be executed without the occurrence of a deadline mistake.